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Sonics Introduces SoC Performance Profile And Debug IP For System Architects And Software Developers

18/03/2014 by

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On-Chip Network Monitor and Trace Technology Supports Rapid Prototyping, Application Development, and System Validation for Complex SoCs

Sonics, Inc, the world’s foremost supplier of on-chip network (NoC) technologies and services, today introduced Sonics Performance Monitor and Hardware Trace™ (SonicsMT™), a new semiconductor intellectual property (IP) product that accelerates the post-silicon system validation and software development processes for complex systems-on-chip (SoC). SonicsMT enables architects and software development teams to create SoC performance and debugging strategies that significantly shorten the time from silicon production to optimized working system.

“Today’s SoCs contain multiple programmable processors and cores that generate a huge volume of transactions,” said Ray Brinks, senior vice president of operations at Sonics. “On-chip performance analysis and troubleshooting techniques are now a must-have requirement for our customers and prospects using NoCs and shared memory in their designs. Complexity of communication between the cores makes real-time, at-speed debugging a necessity in order to find and fix problems with their operation and software interaction. SonicsMT provides SoC designers and software engineers the capability to visualize internal performance behaviors and tune system and software performance with pinpoint accuracy in a non-intrusive manner.”

Accurately Profiles System Behavior and Performance Metrics

SonicsMT is automatically embedded inside the on-chip interconnect and leverages existing NoC infrastructure to minimize gate count while achieving real-time, at speed (within one clock cycle of the event) monitoring and tracing of the critical performance metrics. It facilitates analysis and debug strategies for:

  • Chip Architecture Exploration – performance and mode interactions, power usage, memory utilization, traffic congestion for the current design as well as next-generation products;
  • Software Development – driver and application debug, memory optimization, algorithm development, power optimization, hardware acceleration interactions;
  • Chip Services – performance guarantees, class of service monitoring.

SonicsMT visualizes metrics such as burst density, read-write turnaround, and other key characteristics of SoC traffic that greatly influence overall system performance. The SoC designer defines design-time configuration parameters that precisely specify the requirements needed for each SonicsMT instance in the NoC. The designer also defines the trace packets that are of interest based on their knowledge of the application. Performance measurements and tracing are taken in “windows” that can automatically repeat for long debug runs which create histograms of the various metrics over time.

This article has been extracted from http://www.prnewswire.com, please click on this link to read the article in full http://www.prnewswire.com/news-releases/sonics-introduces-soc-performance-profile-and-debug-ip-for-system-architects-and-software-developers-250763011.html

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