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Intel’s Next-Generation of High-Performance Computing Architecture

7/12/2015 by

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Enterprises and research centers investigating the future of their HPC infrastructure can expect a new design philosophy coming from Intel. The company says their Intel® Scalable System Framework (Intel® SSF) is a new architectural direction for HPC systems that are not only balanced, power-efficient, and reliable, but are also able to run a wide range of workloads. Their approach is intended to converge the system architecture needed to support HPC, Big Data, machine learning, and visualization workloads, along with HPC in the cloud. That should make HPC resources more available to more users, which can create greater opportunities for discovery and insight.

From a hardware perspective, Intel SSF is designed to eliminate the traditional performance bottlenecks—the so called power, memory, storage, and I/O walls that system designers, builders and users have been fighting against for years. The new direction focuses on addressing the compute, memory/storage, fabric/communications, and software challenges of developing and deploying HPC systems. It does this in a more holistic way by taking a three-pronged approach through 1) breakthrough technologies, 2) a new architectural approach to assembling those technologies, and 3) a versatile and cohesive set of HPC system software stacks that can extract the full potential of the system.

Solving Today’s HPC Challenges

Intel SSF will combine new technologies—such as Intel® Omni-Path Architecture (Intel® OPA)—and incorporate their existing compute and storage products, including the Intel® Xeon® processors, Intel® Xeon Phi™ processors, and Intel® Enterprise Edition for Lustre* software. According to the company, other innovative technologies that will improve data movement are in the making.

Their new direction, however, goes beyond these technologies designed to overcome the barriers mentioned above. They are tightly integrating the technologies at both the component and system levels, to create a highly efficient and capable infrastructure. One of the outcomes to this level of integration is how it scales across the node and system. The result is that it essentially raises the center of gravity of the memory pyramid and makes it fatter, which will enable faster and more efficient data movement.

This article has been extracted from http://www.hpcwire.com, please click on this link to read the article in full http://www.hpcwire.com/2015/12/07/intels-next-generation-of-high-performance-computing-architecture/

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